Internet Data Sheet
HYB25D512[400/160/800]C[E/T/F/C](L)
512-Mbit Double-Data-Rate SDRAM
Parameter
Symbol
Values
Typ.
Unit
Note/
Test Condition
Min.
Max.
Input/Output Capacitance: DQ, DQS, DM
CIO
3.5
4.0
—
—
—
—
4.5
5.0
0.5
pF
pF
pF
TFBGA 1)2)
TSOPII 1)2)
1)
Delta Input/Output Capacitance: DQ, DQS,
DM
CdIO
1) These values are guaranteed by design and are tested on a sample base only. VDDQ = VDD = 2.5 V ± 0.2 V, f = 100 MHz, TA = 25 °C,
OUT(DC) = VDDQ/2, VOUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
V
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching at the
board level.
Rev. 1.31, 2006-09
24
03292006-3TFJ-HNV3
QIMONDA [ QIMONDA AG ]
