Internet Data Sheet
HY[B/I]25DC512[80/16]0D[E/F](L)
512-Mbit Double-Data-Rate SDRAM
TABLE 24
DD Specification
I
Symbol
–4
–5A
–5
–6
Unit
Note1)
DDR500B
DDR400A
DDR400B
DDR333B
IDD0
IDD1
64
66
71
76
1.1
26
17
9
54
56
59
64
1.0
22
15
8
54
56
59
64
1.0
22
15
8
46
48
51
55
1.0
20
14
8
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
×8 2)3)
×16 3)
×8 3)
×16 3)
3)
IDD2P
IDD2F
IDD2Q
IDD3P
IDD3N
3)
3)
3)
30
33
68
88
67
84
144
1.6
1.4
130
155
26
29
57
73
57
70
123
1.5
1.4
166
177
26
29
57
73
57
70
123
1.5
1.4
166
177
23
26
49
63
49
61
110
1.5
1.4
139
149
×8 3)
×16 3)
×8 3)
×16 3)
×8 3)
×16 3)
IDD4R
IDD4W
3)
IDD5
IDD6
IDD6L
IDD7
4)
Low power 5)
×8 3)
×16 3)
1) Test conditions : VDD = 2.7 V, TA = 10 °C.
2) IDD specifications are tested after the device is properly initialized and measured at 200 MHz.
3) Input slew rate = 1 V/ns.
4) Enables on-chip refresh and address counters.
5) IDD6LMax = 2.5 mA.
Rev. 1.10, 2008-05
31
06212007-08MW-K87L
QIMONDA [ QIMONDA AG ]
