Internet Data Sheet
HY[B/I]25DC512[80/16]0D[E/F](L)
512-Mbit Double-Data-Rate SDRAM
Pin#
Name
Pin
Type
Buffer
Type
Function
6, 12, 52, 58, 64 VSSQ
34,48, 66 VSS
PWR
PWR
—
—
Power Supply
Power Supply
Not Connected × 8 Organization
4, 7, 10, 13, 14, NC
16, 17, 19, 20,
25, 43, 50, 53,
54, 57, 60, 63
NC
—
—
Not Connected ×16 Organization
14, 17, 19, 25, NC
43, 50, 53
NC
TABLE 7
Abbreviations for Pin Type
Abbreviation
Description
I
Standard input-only pin. Digital levels
Output. Digital levels
I/O is a bidirectional input/output signal
Input. Analog levels
Power
O
I/O
AI
PWR
GND
NC
Ground
Not Connected
TABLE 8
Abbreviations for Buffer Type
Abbreviation
Description
SSTL
Serial Stub Terminalted Logic (SSTL2)
Low Voltage CMOS
LV-CMOS
CMOS
OD
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR
Rev. 1.10, 2008-05
13
06212007-08MW-K87L
QIMONDA [ QIMONDA AG ]
