HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM
Functional Description
CAS Latency = 2
CK
CK
Read
NOP
NOP
NOP
NOP
NOP
Command
Address
BA a,COL n
CL=2
DQS
DQ
DOa-n
CAS Latency = 2.5
CK
CK
Read
NOP
NOP
NOP
NOP
NOP
Command
Address
BA a,COL n
CL=2.5
DQS
DQ
DOa-n
Don’t Care
DO a-n = data out from bank a, column n.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal tAC, tDQSCK, and tDQSQ
.
Figure 10 Read Burst: CAS Latencies (Burst Length = 4)
Data Sheet
26
Rev. 1.21, 2004-07
02102004-TSR1-4ZWW