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HYB25D256400BTL-6 参数 Datasheet PDF下载

HYB25D256400BTL-6图片预览
型号: HYB25D256400BTL-6
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX4, 0.7ns, CMOS, PDSO66]
分类和应用: 时钟动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 83 页 / 3071 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB25D256[400/800/160]B[T/C](L)  
256-Mbit Double Data Rate SDRAM  
Functional Description  
Table 6  
Truth Table 1a: Commands  
Name (Function)  
CS RAS CAS WE Address MNE  
Notes  
1)9)  
Deselect (NOP)  
H
L
L
L
L
L
L
L
L
X
H
L
X
H
H
L
X
H
H
H
L
X
X
NOP  
NOP  
1)9)2)  
1)3)  
No Operation (NOP)  
Active (Select Bank And Activate Row)  
Read (Select Bank And Column, And Start Read Burst)  
Write (Select Bank And Column, And Start Write Burst)  
Burst Terminate  
Bank/Row ACT  
Bank/Col Read  
Bank/Col Write  
1)4)  
H
H
H
L
1)4)5)  
1)8)6)  
1)5)7)  
1)6)7)8)  
1)2)9)  
L
H
H
L
L
X
BST  
Precharge (Deactivate Row In Bank Or Banks)  
Auto Refresh Or Self Refresh (Enter Self Refresh Mode)  
Mode Register Set  
L
Code  
X
PRE  
L
H
L
AR/ SR  
L
L
Op-Code MRS  
1) CKE is HIGH for all commands shown except Self Refresh.  
2) Deselect and NOP are functionally interchangeable.  
3) BA0-BA1 provide bank address and A0-A12 provide row address.  
4) BA0, BA1 provide bank address; A0-Ai provide column address (where i = 8 for x16, i = 9 for x8 and 9, 11 for x4); A10  
HIGH enables the Auto Precharge feature (nonpersistent), A10 LOW disables the Auto Precharge feature.  
5) Applies only to read bursts with Auto Precharge disabled; this command is undefined (and should not be used) for read  
bursts with Auto Precharge enabled or for write bursts.  
6) A10 LOW: BA0, BA1 determine which bank is precharged. A10 HIGH: all banks are precharged and BA0, BA1 are “Don’t  
Care”.  
7) This command is AUTO REFRESH if CKE is HIGH; Self Refresh if CKE is LOW.  
8) Internal refresh counter controls row and bank addressing; all inputs and I/Os are “Don’t Care” except for CKE.  
9) BA0, BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1  
= 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the op-code to be  
written to the selected Mode Register).  
Table 7  
Truth Table 1b: DM Operation  
Name (Function)  
Write Enable  
DM  
L
DQs  
Valid  
X
Notes  
1)  
1)  
Write Inhibit  
H
1) Used to mask write data; provided coincident with the corresponding data.  
Data Sheet  
23  
Rev. 1.21, 2004-07  
02102004-TSR1-4ZWW  
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