Internet Data Sheet
HYB18H1G321AF–10/11/14
1-Gbit GDDR3
4.2
Extended Mode Register Set Command (EMRS1)
The Extended Mode Register is used to control multiple
operation modes of the device. The most important one is the
organization as a 1-CS or a 2-CS device. Furthermore, it is
used to set the output driver impedance value, the termination
impedance value, the Write Recovery time value for Write
with Autoprecharge. It is used as well to enable/disable the
DLL, to issue the Vendor ID. There is no default value for the
Extended Mode Register. Therefore it must be written after
power up to operate the GDDR3 Graphics RAM.The
Extended Mode Register can be programmed by performing
a normal Mode Register Set operation and setting the BA0 bit
to HIGH. All other bits of the EMR register are reserved and
should be set to LOW.The Extended Mode Register must be
loaded when all banks are idle and no burst are in progress.
The controller must wait the specified time tMRD before
initiating any subsequent operation (Figure 10). The timing of
the EMRS command operation is equivalent to the timing of
the MRS command operation.
FIGURE 8
Extended Mode Register Set Command
CLK#
CLK
CKE
CS#
RAS#
CAS#
To apply an EMRS command, CS0 has to be used.
WE#
A0-A11
BA0
COD
1
COD: Code to be loaded into
the register
BA1
0
Don't Care
BA2
Mode
Rev. 0.92, 2007-10
06122007-MW7D-3G3M
20
QIMONDA [ QIMONDA AG ]
