HYB18T512xxxBF–[2.5…5]
512-Mbit Double-Data-Rate-Two SDRAM
1
Overview
This chapter gives an overview of the 512-Mbit Double-Data-Rate-Two SDRAM product family and describes its
main characteristics.
1.1
Features
The 512-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
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1.8 V ± 0.1 V Power Supply
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Posted CAS by programmable additive latency for
better command and data bus efficiency
Off-Chip-Driver impedance adjustment (OCD) and
On-Die-Termination (ODT) for better signal quality.
Auto-Precharge operation for read and write bursts
Auto-Refresh, Self-Refresh and power saving
Power-Down modes
1.8 V ± 0.1 V (SSTL_18) compatible I/O
DRAM organizations with 4, 8 and 16 data
in/outputs
Double Data Rate architecture: two data transfers
per clock cycle four internal banks for concurrent
operation
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Programmable CAS Latency: 3, 4, 5 and 6
Programmable Burst Length: 4 and 8
Differential clock inputs (CK and CK)
Bi-directional, differential data strobes (DQS and
DQS) are transmitted / received with data. Edge
aligned with read data and center-aligned with write
data.
DLL aligns DQ and DQS transitions with clock
DQS can be disabled for single-ended data strobe
operation
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Average Refresh Period 7.8 µs at a TCASE lower
than 85 °C, 3.9 µs between 85 °C and 95 °C
Programmable self refresh rate via EMRS2 setting
Programmable partial array refresh via EMRS2
settings
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DCC enabling via EMRS2 setting
Full and reduced Strength Data-Output Drivers
1kB page size for ×4 & ×8, 2kB page size for ×16
Packages: P-TFBGA-60 for ×4 & ×8 components P-
TFBGA-84 for ×16 components
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Commands entered on each positive clock edge,
data and data mask are referenced to both edges of
DQS
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RoHS Compliant Products1)
All Speed grades faster than DDR400 comply with
DDR400 timing specifications when run at a clock
rate of 200 MHz.
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Data masks (DM) for write data
A list of the performance tables for the various speeds can be found below
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Table 1 “Performance for DDR2–800” on Page 4
Table 2 “Performance for DDR2–667” on Page 4
Table 3 “Performance for DDR2–533C” on Page 4
Table 4 “Performance for DDR2–400B” on Page 5
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic
equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January
2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and
polybrominated biphenyl ethers.
Internet Data Sheet
3
Rev. 1.05, 2007-01
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
