Internet Data Sheet
HYB18T512161B2F–20/25
512-Mbit Double-Data-Rate-Two SDRAM
5.2
DC Characteristics
TABLE 17
Recommended DC Operating Conditions (SSTL_18)
Symbol
Parameter
Rating
Min.
Unit
Notes
Typ.
Max.
1)2)
1)2)
1)2)
3)4)
5)
VDD
Supply Voltage
1.7
1.8
1.9
V
V
V
V
V
VDDDL
VDDQ
VREF
VTT
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
1.7
1.8
1.9
1.7
1.8
1.9
0.49 × VDDQ
0.5 × VDDQ
VREF
0.51 × VDDQ
VREF – 0.04
VREF + 0.04
1) HYB18T512161B2F–20/25
2) DDQ tracks with VDD, VDDDL tracks with VDD. AC parameters are measured with VDD, VDDQ and VDDDL tied together.
3) The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF is expected to
V
be about 0.5 × VDDQ of the transmitting device and VREF is expected to track variations in VDDQ
.
4) Peak to peak ac noise on VREF may not exceed ± 2% VREF (dc)
5)
V
TT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and
must track variations in die dc level of VREF
.
TABLE 18
ODT DC Electrical Characteristics
Parameter / Condition
Symbol
Min.
Nom.
Max.
Unit
Note
1)
Termination resistor impedance value for
EMRS(1)[A6,A2] = [0,1]; 75 Ohm
Rtt1(eff)
60
75
90
Ω
1)
1)
2)
Termination resistor impedance value for
EMRS(1)[A6,A2] =[1,0]; 150 Ohm
Rtt2(eff)
Rtt3(eff)
delta VM
120
40
150
50
180
Ω
Ω
%
Termination resistor impedance value for
EMRS(1)(A6,A2)=[1,1]; 50 Ohm
60
Deviation of VM with respect to VDDQ / 2
–6.00
—
+ 6.00
1) Measurement Definition for Rtt(eff): Apply VIH(ac) and VIL(ac) to test pin separately, then measure current I(VIHac) and I(VILac) respectively.
Rtt(eff) = (VIH(ac) – VIL(ac)) /(I(VIHac) – I(VILac)).
2) Measurement Definition for VM: Turn ODT on and measure voltage (VM) at test pin (midpoint) with no load: delta VM = ((2 x VM / VDDQ) –
1) x 100%
TABLE 19
Input and Output Leakage Currents
Symbol
Parameter / Condition
Min.
Max.
Unit
Notes
1)
IIL
Input Leakage Current; any input 0 V < VIN < VDD
Output Leakage Current; 0 V < VOUT < VDDQ
–2
–5
+2
+5
μA
μA
2)
IOL
1) all other pins not under test = 0 V
2) DQ’s, LDQS, LDQS, UDQS, UDQS, DQS, DQS are disabled and ODT is turned off
Rev. 1.1, 2007-06
18
05152007-ZYAH-ACMZ
Date: 2008-02-26
QIMONDA [ QIMONDA AG ]
