Internet Data Sheet
HYB18T512161BF–20/22/25/28/33
512-Mbit Double-Data-Rate-Two SDRAM
5.7
AC Characteristics
5.7.1
Speed Grade Definitions
TABLE 28
Speed Grade Definition
Speed Grade
Parameter
–20
–22
–25
–28
–33
Unit Note
Symbol Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
1)2)3)4)
Clock
Frequency
@ CL = 3 tCK
@ CL = 4 tCK
@ CL = 5 tCK
@ CL = 6 tCK
@ CL = 7 tCK
3.75
3.75
3
8
3.75
3.75
3
8
3.75
3.75
3
8
3.75
3.75
3
8
3.75
3.75
3.33
3.33
—
8
ns
1)2)3)4)
8
8
8
8
8
ns
1)2)3)4)
8
8
8
8
8
ns
1)2)3)4)
2.5
2.0
45
8
2.5
2.2
45
8
2.5
—
8
2.8
—
8
8
ns
1)2)3)4)
8
8
—
70k
—
70k
—
70k
ns
1)2)3)4)
Row Active Time
tRAS
70k
70k
45
45
45
ns
5)
1)2)3)4)
Row Cycle Time
tRC
60
15
15
—
—
—
60
15
15
—
—
—
60
15
15
—
—
—
60
15
15
—
—
—
60
15
15
—
—
—
ns
1)2)3)4)
RAS-CAS-Delay
Row Precharge Time
tRCD
tRP
ns
1)2)3)4)
ns
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. For other Slew Rates see Chapter 7.Timings
are further guaranteed for normal OCD drive strength (EMRS(1) A1 = 0).
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, input reference
level is the crosspoint when in differential strobe mode.
3) Inputs are not recognized as valid until VREF stabilizes. During the period before VREF stabilizes, CKE = 0.2 x VDDQ is recognized as low.
4) The output timing reference voltage level is VTT
.
5) RAS.MAX is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x tREFI
t
.
Rev. 1.43, 2006-11
26
03292006-L40N-L04G
QIMONDA [ QIMONDA AG ]
