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Internet Data Sheet
HY[B/I]18T256[40/80/16]0A[C/F](L)
256-Mbit Double-Data-Rate-Two SDRAM
3.4
Extended Mode Register EMR(3)
The Extended Mode Register EMR(3) is reserved for future use and all bits except BA0 and BA1 must be programmed to 0
when setting the mode register during initialization.
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TABLE 14
EMR(3) Programming Extended Mode Register Definition, BA2:0=011B
Field
Bits
Type1)
Description
BA2
16
reg.addr
Bank Address 2
Note: BA2 is not available on 256Mbit and 512Mbit components
0B
BA2 Bank Address
BA1
BA0
A
15
Bank Adress 1
1B
BA1 Bank Address
14
Bank Adress 0
1B
BA0 Bank Address
[13:0]
w
Address Bus 13:0
Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration
00000000000000BA[13:0] Address bits
1) w = write only
Rev. 1.50, 2007-12
23
03062006-7M17-PXBC
QIMONDA [ QIMONDA AG ]
