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HYB18T256400AFL-3.7 参数 Datasheet PDF下载

HYB18T256400AFL-3.7图片预览
型号: HYB18T256400AFL-3.7
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 63 页 / 3597 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HY[B/I]18T256[40/80/16]0A[C/F](L)  
256-Mbit Double-Data-Rate-Two SDRAM  
Ball#  
Name  
Ball  
Type  
Buffer  
Type  
Function  
Not Connected ×8 Organization  
G1, L3, L7, L8 NC NC  
Other Balls ×4 Organization  
F9 ODT  
Other Balls ×8 Organization  
Not Connected  
I
SSTL  
SSTL  
On-Die Termination Control  
On-Die Termination Control  
F9  
ODT  
I
TABLE 5  
Abbreviations for Ball Type  
Abbreviation  
Description  
I
Standard input-only ball. Digital levels.  
Output. Digital levels.  
I/O is a bidirectional input/output signal.  
Input. Analog levels.  
Power  
O
I/O  
AI  
PWR  
GND  
NC  
Ground  
Not Connected  
TABLE 6  
Abbreviations for Buffer Type  
Abbreviation  
Description  
SSTL  
Serial Stub Terminated Logic (SSTL_18)  
Low Voltage CMOS  
LV-CMOS  
CMOS  
OD  
CMOS Levels  
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and  
allows multiple devices to share as a wire-OR.  
Rev. 1.50, 2007-12  
10  
03062006-7M17-PXBC  
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