HYB18T1G[40/80/16]0AF(L)–[3S/3.7/5]
1-Gbit DDR2 SDRAM
Operating Conditions
5.3
DC & AC Characteristics
DDR2 SDRAM pin timing are specified for either single relative to the rising or falling edges of DQS crossing at
ended or differential mode depending on the setting of REF. In differential mode, these timing relationships
V
the EMRS(1) “Enable DQS” mode bit; timing are measured relative to the crosspoint of DQS and its
advantages of differential mode are realized in system complement, DQS. This distinction in timing methods is
design. The method by which the DDR2 SDRAM pin verified by design and characterization but not subject
timing are measured is mode dependent. In single to production test. In single ended mode, the DQS (and
ended mode, timing relationships are measured RDQS) signals are internally disabled and don’t care.
Table 22
DC & AC Logic Input Levels
DDR2-400, DDR2-533
Min. Max.
Symbol Parameter
DDR2-667
Min.
Unit
Max.
VIH(dc)
VIL(dc)
VIH(ac)
VIL(ac)
DC input logic high
V
REF + 0.125
V
V
DDQ + 0.3
REF – 0.125
V
REF + 0.125
V
DDQ + 0.3
REF – 0.125
V
V
V
V
DC input low
–0.3
–0.3
V
AC input logic high
AC input low
VREF + 0.250
—
V
REF + 0.200
—
—
V
REF – 0.250
—
VREF – 0.200
Table 23
Symbol
VREF
Single-ended AC Input Test Conditions
Condition
Value
0.5 x VDDQ
1.0
Unit
V
Note
1)
Input reference voltage
VSWING.MAX
SLEW
Input signal maximum peak to peak swing
Input signal minimum Slew Rate
V
2)3)
1.0
V / ns
1) Input waveform timing is referenced to the input signal crossing through the VREF level applied to the device under test.
2) The input signal minimum Slew Rate is to be maintained over the range from VIH(ac).MIN to VREF for rising edges and the
range from VREF to VIL(ac).MAX for falling edges as shown in Figure 4
3) AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions and VIH(ac) to VIL(ac)
on the negative transitions.
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Figure 4
Single-ended AC Input Test Conditions Diagram
Internet Data Sheet
26
Rev. 1.31, 2007-01
03292006-1X3H-6X8S
QIMONDA [ QIMONDA AG ]
