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HYB18T1G160AF-5 参数 Datasheet PDF下载

HYB18T1G160AF-5图片预览
型号: HYB18T1G160AF-5
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX16, 0.6ns, CMOS, PBGA92, ROHS COMPLIANT, PLASTIC, TFBGA-92]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 53 页 / 2560 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB18T1G[40/80/16]0AF(L)–[3S/3.7/5]  
1-Gbit DDR2 SDRAM  
Operating Conditions  
5.2  
DC Characteristics  
Table 19  
Symbol  
Recommended DC Operating Conditions (SSTL_18)  
Parameter  
Rating  
Min.  
Unit  
Note  
Typ.  
1.8  
Max.  
1.9  
1)  
VDD  
Supply Voltage  
1.7  
V
V
V
V
V
VDDDL  
VDDQ  
VREF  
VTT  
Supply Voltage for DLL  
Supply Voltage for Output  
Input Reference Voltage  
Termination Voltage  
1.7  
1.8  
1.9  
1.7  
1.8  
1.9  
2)3)  
4)  
0.49 × VDDQ  
0.5 × VDDQ  
VREF  
0.51 × VDDQ  
V
REF – 0.04  
VREF + 0.04  
1) VDDQ tracks with VDD, VDDDL tracks with VDD. AC parameters are measured with VDD, VDDQ and VDDDL tied together.  
2) The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF  
is expected to be about 0.5 x VDDQ of the transmitting device and VREF is expected to track variations in VDDQ  
3) Peak to peak ac noise on VREF may not exceed ± 2% VREF (dc)  
.
4) VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal  
to VREF, and must track variations in die dc level of VREF  
.
Table 20  
ODT DC Electrical Characteristics  
Parameter / Condition  
Symbol  
Min.  
Nom.  
Max.  
Unit  
Note  
1)  
Termination resistor impedance value for  
EMRS(1)[A6,A2] = [0,1]; 75 Ohm  
Rtt1(eff)  
60  
75  
90  
Termination resistor impedance value for  
EMRS(1)[A6,A2] =[1,0]; 150 Ohm  
Rtt2(eff)  
Rtt3(eff)  
delta VM  
120  
40  
150  
50  
180  
%
Termination resistor impedance value for  
EMRS(1)(A6,A2)=[1,1]; 50 Ohm  
60  
2)  
Deviation of VM with respect to VDDQ / 2  
–6.00  
+ 6.00  
1) Measurement Definition for Rtt(eff): Apply VIH(ac) and VIL(ac) to test pin separately, then measure current I(VIHac) and I(VILac  
respectively. Rtt(eff) = (VIH(ac) – VIL(ac)) /(I(VIHac) – I(VILac)).  
)
2) Measurement Definition for VM: Turn ODT on and measure voltage (VM) at test pin (midpoint) with no load:  
delta VM = ((2 x VM / VDDQ) – 1) x 100%  
Table 21  
Symbol  
IIL  
Input and Output Leakage Currents  
Parameter / Condition  
Min.  
–2  
Max.  
+2  
Unit  
µA  
Note  
1)  
Input Leakage Current; any input 0 V < VIN < VDD  
Output Leakage Current; 0 V < VOUT < VDDQ  
2)  
IOL  
–5  
+5  
µA  
1) All other pins not under test = 0 V  
2) DQ’s, LDQS, LDQS, UDQS, UDQS, DQS, DQS, RDQS, RDQS are disabled and ODT is turned off  
Internet Data Sheet  
25  
Rev. 1.31, 2007-01  
03292006-1X3H-6X8S  
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