HYB18H512321AF
512-Mbit GDDR3
Functional Description
4.3
Extended Mode Register Set Command (EMRS)
The Extended Mode Register is used to set the output
driver impedance value, the termination impedance
value, the Write Recovery time value for Write with
Autoprecharge. It is used as well to enable/disable the
DLL, to issue the Vendor ID and to enable/disable the
Low Power mode. There is no default value for the
Extended Mode Register. Therefore it must be written
after power up to operate the GDDR3 Graphics RAM.
The Extended Mode Register can be programmed by
performing a normal Mode Register Set operation and
setting the BA0 bit to HIGH. All other bits of the EMR
register are reserved and should be set to LOW.
CLK#
CLK
CKE
CS#
RAS#
CAS#
The Extended Mode Register must be loaded when all
banks are idle and no burst are in progress. The
controller must wait the specified time tMRD before
initiating any subsequent operation (Figure 16).
The timing of the EMRS command operation is
equivalent to the timing of the MRS command
operation.
WE#
A0-A11
BA0
COD
1
0
COD: Code to be loaded into
the register
BA1, BA2
Don't Care
Figure 15 Extended Mode Register Set Command
A7
A6
A5
A4
A3
A2
A1
A0
BA2
BA1
BA0
A11
A10
A9
A8
0
1
LP
V
RFU
WR
DLL
WR
Rtt
Data Z
0
Self-
Output Driver
DLL
Enable
A11
A6
A1
A0
Refresh
Impedance
0
1
32ms
8ms
0
1
Enable
0
0
Autocal
0
1
Disable
35
40
45
1
1
0
1
A10 Vendor ID
A7
A5
A4
WR
0
1
Off
On
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
11
4
A3
A2
Termination
0
0
1
0
1
0
ODT disabled
RFU
5
6
ZQ / 4
ZQ / 2
7
1
1
2)
8
(Default)
9
10
Figure 16 Extended Mode Register Bitmap
1. These settings are for debugging purposes only.
2. Default termination values at Power Up.
option implemented in the device) or no action is taken by
the device (if option not implemented).
3. The ODT disable function disables all terminators on
the device.
5. WR (write recovery time for autoprecharge) in clock
cycles is calculated by dividing
up to the next integer (WR[cycles] =
mode register must be programmed to this value.
t
WR (in ns) and rounding
4. If the user activates bits in the extended mode register in
an optional field, either the optional field is activated (if
t
WR[ns] / CK[ns]). The
t
Data Sheet
37
Rev. 1.73, 2005-08
05122004-B1L1-JEN8
QIMONDA [ QIMONDA AG ]
