HYB18H512321AF
512-Mbit GDDR3
Functional Description
4.12
Self-Refresh Exit (SREFEX)
To exit the Self Refresh Mode, a stable external clock
is needed before setting CKE high asynchronously.
Once the Self-Refresh Exit command is registered, a
delay equal or longer than tXSC must be satisfied before
any command can be applied. During this time, the DLL
is automatically enabled, reset and calibrated.
CLK#
CLK
CKE
CKE must remain HIGH for the entire Self-Refresh exit
period and commands must be gated off with CS held
HIGH. Alternately, NOP commands may be registered
on each positive clock edge during the Self Refresh exit
interval.
CS#
RAS#
CAS#
WE#
A0-A11
A9-A11
Don't Care
Figure 56 Self Refresh Exit Command
CLK#
CLK
Command
CKE
N / D
N / D
N / D
A.C.
tXSC
CLK, CLK# must
be stable
A.C.: Any Command
N / D: NOP or DESEL Command
Don't Care
Figure 57 Self Refresh Exit
Data Sheet
72
Rev. 1.73, 2005-08
05122004-B1L1-JEN8
QIMONDA [ QIMONDA AG ]
