PACE 1757 M/ME
SIGNAL DESCRIPTIONS (Continued)
STATUS BUS
Mnemonic
Name
Description
AK - AK
Access key
ActiveHIGHoutputscorrespondingtotheAKfieldoftheprocessorstatus
word used to match the Access Lock in the MMU for memory accesses
(a mismatch will cause the MMU to pull the MEM PRT ER signal LOW),
and also indicate the processor state (PS). Priveledged instructions can
beexecutedwithPS=0only. Thesesignalsaretri-stateforbuscyclesnot
assigned to this CPU
0
3
AS - AS
Address state
ActiveHIGHoutputscorrespondingtotheASfieldoftheprocessorstatus
wordthatselectsthepageregistergroupintheMMU. IntheDMAphysical
demultiplexedmode,AS(0:1)willreceivethe9thand10thmostsignificant
bitsofthephysicaladdressforuseintheBPUfunction. Thesesignalsare
tri-state in bus cycles not assigned to this CPU.
0
3
INFORMATION BUS
Mnemonic Name
IB - IB
Description
Information bus
A bi-directional time-multiplexed address/data BUS. IB is the most
0
15
0
significant bit.
EDC -EDC
Error Detection /
Correction Bus
An active HIGH output BUS used for detection of errors on the data BUS
0
5
(IB -IB ) and correction of single errors. When working in parity mode
0
15
EDC is the parity bit. EDC -EDC are undefined in this case.
0
1
5
A(0:1) /
Address Bus
An active HIGH output BUS from the PIC. Contains the address of the
currentbuscycleaslatchedbytheendofSTRBA. Insystemconfigurations
including the MMU function, the only active lines during memory cycles
are A(4:15). In this example, A(2:3) are high impedance (don't care) and
A(0:1) turn into inputs called Extended Addresses, EXT AD (0:1). In this
situation,thesetwolines,suppliedbytheMMU,willbeusedtooperatethe
programmable ready generation during bus cycles.
EXT ADR(0:1)
A(2:15)
EXT ADR -
Extended Address
Bus
A bi-directionaly active HIGH BUS. In CPU cycles, it is an output BUS
that is used to select one of 256 pages, 4K words each, expanding the
direct addressing space to 1M word. In DMA cycles, indicated by DMA-
ACK being active, it is also an output BUS except when programmed for
the physical demultiplexed DMA mode. In this example, it becomes an
inputtoreceivetheeightmostsignificantbitsoftheDMAphysicaladdress
for use in the BPU function.
0
EXT ADR
7
Do c um e nt # MICRO-10 REV B
Pa g e 26 o f 34
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