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PCS5P23Z09DG-16-TR 参数 Datasheet PDF下载

PCS5P23Z09DG-16-TR图片预览
型号: PCS5P23Z09DG-16-TR
PDF下载: 下载PDF文件 查看货源
内容描述: 多路输出时序- SAFE™峰值EMI降低IC [Multiple Output Timing-Safe™ Peak EMI reduction IC]
分类和应用:
文件页数/大小: 14 页 / 657 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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PCS5P23Z05D  
PCS5P23Z09D  
May 2007  
rev0.2  
Pin Description for PCS5P23Z05D  
Pin #  
Pin Name  
REF  
Description  
Input reference frequency, 5V-tolerant input  
Buffered clock output  
1
2
3
4
5
6
7
8
CLK1 1  
CLK21  
GND  
CLK3 1  
VDD  
Buffered clock output  
Ground  
Buffered clock output  
3.3V supply  
CLK41  
CLKOUT1,2  
Buffered clock output  
Buffered clock output, internal feedback on this pin  
Notes: 1. Weak pull-down on these outputs.  
2. This output is driven and has an internal feedback for the PLL.  
3. Buffered clock outputs are Timing-Safe™  
Pin Description for PCS5P23Z09D  
Pin #  
1
Pin Name  
REF  
CLKA11  
CLKA21  
VDD  
Description  
Input reference frequency, 5V tolerant input  
Buffered clock output, bank A  
Buffered clock output, bank A  
3.3V supply  
2
3
4
5
GND  
Ground  
6
CLKB11  
CLKB21  
S22  
Buffered clock output, bank B  
Buffered clock output, bank B  
Select input, bit 2  
7
8
9
S12  
Select input, bit 1  
10  
11  
12  
13  
14  
15  
16  
CLKB31  
CLKB41  
GND  
Buffered clock output, bank B  
Buffered clock output, bank B  
Ground  
VDD  
3.3V supply  
CLKA31  
CLKA41  
CLKOUT1,3  
Buffered clock output, bank A  
Buffered clock output, bank A  
Buffered output, internal feedback on this pin  
Notes: 1. Weak pull-down on these outputs.  
2. Weak pull-up on these inputs.  
3. This output is driven and has an internal feedback for the PLL.  
4. Buffered clock outputs are Timing-Safe™  
Multiple Output Timing-Safe™ Peak EMI reduction IC  
4 of 14  
Notice: The information in this document is subject to change without notice.  
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