September 2006
PCS2P5T915A
rev 0.2
Power Supply Characteristics for eHSTL Outputs1
Symbol Parameter
Test Conditions2
Typ Max
Unit
Quiescent VDD Power
VDDQ= Max., Reference Clock = LOW3
Outputs enabled, All outputs unloaded
VDDQ= Max., Reference Clock = LOW3
Outputs enabled, All outputs unloaded
IDDQ
20
30
mA
Supply Current
Quiescent VDDQ Power
Supply Current
Dynamic VDD Power Supply
Current per Output
IDDQQ
0.1
0.3
mA
IDDD
VDD= Max., VDDQ= Max., CL= 0pF
20
40
30
60
µA/MHz
Dynamic VDDQ Power
Supply
IDDDQ
ITOT
VDD= Max., VDDQ= Max., CL= 0pF
µA/MHz
mA
Current per Output
Total Power VDD Supply
Current
VDDQ= 1.8V, FREFERENCE CLOCK= 100MHz, CL= 15pF
VDDQ= 1.8V, FREFERENCE CLOCK= 250MHz, CL= 15pF
VDDQ= 1.8V, FREFERENCE CLOCK= 100MHz, CL= 15pF
VDDQ= 1.8V, FREFERENCE CLOCK= 250MHz, CL= 15pF
20
35
40
80
40
50
80
Total Power VDDQ Supply
Current
ITOTQ
mA
160
Notes: 1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
Differential Input AC Test Conditions for eHSTL
Symbol
VDIF
VX
VTHI
tR, tF
Parameter
Value
Units
V
mV
V
Input Signal Swing1
1
Differential Input Signal Crossing Point2
Input Timing Measurement Reference Level3
Input Signal Edge Rate4
900
Crossing Point
1
V/nS
Notes: 1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant
devices must meet the VDIF (AC) specification under actual use conditions.
2. A 900mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices
must meet the VX specification under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/nS or greater is to be maintained in the 20% to 80% range of the input waveform.
DC Electrical Characteristics Over Operating Range for LVEPECL1
Symbol
Parameter
Test Conditions
Min
Typ2
Max
Unit
Input Characteristics
IIH
IIL
VIK
VIN
Input HIGH Current6
VDD= 2.6V
VDD= 2.6V
VI = VDDQ/GND
VI = GND/VDDQ
±5
±5
- 1.2
3.6
µA
Input LOW Current6
Clamp Diode Voltage
DC Input Voltage
VDD= 2.4V, IIN= -18mA
-0.7
V
V
- 0.3
915
DC Common Mode Input
VCM
1082
1082
1248
mV
mV
Voltage3,5
Single-Ended Reference
Voltage4,5
VREF
VIH
VIL
DC Input HIGH
DC Input LOW
1275
555
1620
875
mV
mV
Notes: 1. See RECOMMENDED OPERATING RANGE table.
2. Typical values are at VDD = 2.5V, +25°C ambient.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation while in differential mode, A/VREF is tied to the DC Voltage VREF
.
5. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input
interface table should be referenced.
6. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
8 of 23
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
