May 2008
rev 0.5
ASM3P622S00B/E
Pin Configuration for ASM3P622S00E
1
16
CLKOUT
CLKIN
CLKOUT7
2
3
CLKOUT1
VDD
15
14
CLKOUT6
13
12
4
5
6
SS%
GND
VDD
GND
ASM3P622S00E
CLKOUT2
11 CLKOUT5
10
9
CLKOUT4
SSON
7
8
CLKOUT3
DLY_CTRL
Pin Description for ASM3P622S00E
Pin #
Pin Name
CLKIN1
CLKOUT12
VDD
Type
Description
1
2
3
4
I
O
P
I
External reference Clock input, 5V tolerant input
Buffered clock output4
3.3V supply
SS%3
Spread Spectrum Selection. Refer Spread Spectrum Control and Input-Output Skew
Table. Has an internal pull up resistor
5
6
7
8
GND
P
O
O
O
Ground
Buffered clock output4
Buffered clock output4
CLKOUT22
CLKOUT32
DLY_CTRL
External Input-Output Delay control.
Spread Spectrum enable and disable option. When SSON is HIGH, the spread
9
SSON3
I
spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal
pull up resistor
10
11
12
13
14
15
16
CLKOUT42
CLKOUT52
GND
O
O
P
Buffered clock output4
Buffered clock output4
Ground
VDD
P
3.3V supply
CLKOUT62
CLKOUT72
CLKOUT2
O
O
O
Buffered clock output4
Buffered clock output4
Buffered clock output4
Notes: 1.Weak pull down
2. Weak pull-down on all outputs
3. Weak pull-up on these Inputs
4. Buffered clock output is Timing-Safe™
Low Frequency Timing-Safe™ Peak EMI Reduction IC
4 of 15
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
