RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
256-pin CSBGA Alphabetical Pinout cont’d.
Pin
Function
Pin
Function
Pin
Function
C12
VccInt
Y1
VccIO
C20
Vss
D8
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccInt
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
V18
W2
T3
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccIO
VccJ
VccOK
VccP
VccP
VREF_In
VREF_In
Vss
F20
J20
M20
R1
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
VssP
WrRdy*
F4
G4
L4
V3
R17
T18
U10
U14
V14
U11
V11
W15
P4
W19
U4
V1
W1
W17
Y9
U12
U16
Y20
Y16
P18
V6
U2
V2
W18
Y2
Y7
Y6
U8
B13
V10
A9
Y18
U19
V19
W3
Y3
V8
W8
A1
B1
Vss
D5
B17
C1
Vss
D9
Vss
Y15
Y19
R20
V20
W4
W20
Y12
U7
D17
E17
J17
M17
B2
F1
Vss
J1
Vss
M1
A2
Vss
Vss
A6
Vss
C18
B19
C3
A18
B18
C2
Vss
Vss
Vss
W5
A20
D4
D2
Vss
A3
Vss
D12
D16
E4
A15
A19
B3
Vss
Vss
Vss
J4
C19
D19
A12
B4
Vss
M4
Vss
T17
U9
Vss
Vss
U17
B20
Vss
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2100294, Issue 2
72
PMC [ PMC-SIERRA, INC ]
