RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
256-pin CSBGA Alphanumerical Pinout cont’d.
Pin
P1
Function
SysAD15
RspSwap*
PAck*
Pin
U15
U16
U17
U18
U19
U20
V1
Function
INT3*
Pin
W13
W14
W15
W16
W17
W18
W19
W20
Y1
Function
SysCmd5
SysCmdP
VccInt
INT1*
P2
VccIO
P3
VccIO
P4
VccInt
INT6*
P17
P18
P19
P20
R1
ColdReset*
VccOK
BigEndian
Reset*
Vss
Vss
Vss
INT7*
Vss
Vss
VccIO
V2
Vss
Vss
V3
VccIO
VccIO
R2
Do Not Connect
JTDI
V4
RDType
RdRdy*
VccP
Y2
Vss
R3
V5
Y3
Vss
R4
JTCK
V6
Y4
ModeIn
ValidOut*
Vss
R17
R18
R19
R20
T1
VccInt
V7
SysClock*
VccInt
Y5
ExtRqst*
NMI*
V8
Y6
V9
Do Not Connect
VREF_In
VccInt
Y7
VccP
Vss
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
V20
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
Y8
Do Not Connect
Vss
PRqst*
JTDO
Y9
T2
SysCmd3
SysCmd6
VccInt
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Do Not Connect
SysCmd0
Vss
T3
VccIO
T4
JTRST*
VccIO
T17
T18
T19
T20
U1
INT2*
SysCmd4
SysCmd8
Vss
VccInt
INT5*
INT9*
INT4*
INT8*
VccIO
VccJ
ModeClock
Vss
Vss
INT0*
U2
Vss
Vss
U3
JTMS
Vss
Vss
U4
VccIO
VccIO
VccIO
U5
JTAGSEL
ValidIn*
VssP
Vss
U6
Vss
U7
WrRdy*
Release*
SysClock
VccInt
U8
VccInt
U9
VccIO
U10
U11
U12
U13
U14
VccInt
VccInt
Do Not Connect
Do Not Connect
SysCmd1
SysCmd2
VccIO
SysCmd7
VccInt
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2100294, Issue 2
70
PMC [ PMC-SIERRA, INC ]
