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PM9315-HC 参数 Datasheet PDF下载

PM9315-HC图片预览
型号: PM9315-HC
PDF下载: 下载PDF文件 查看货源
内容描述: 增强TT1 ™交换机结构 [ENHANCED TT1⑩ SWITCH FABRIC]
分类和应用: 电信集成电路电信电路
文件页数/大小: 343 页 / 5229 K
品牌: PMC [ PMC-SIERRA, INC ]
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Released  
PMC-Sierra, Inc.  
PM9311/2/3/5 ETT1™ CHIP SET  
Data Sheet  
PMC-2000164  
ISSUE 3  
ENHANCED TT1™ SWITCH FABRIC  
The information carried on the links is protected by checksums. For example, if the EPP receives  
information with a checksum error on one link, then it simply ignores that link and uses the information from  
the other link. All errors are reported to the local CPU via interrupts.  
The redundant core is tolerant of such single errors, provided that they are detectable. In general, all errors  
that occur on the links or within the Scheduler or Crossbar will be detectable.  
It should be clear from Figure 6 that only the Dataslice and EPP have the redundant connections. An  
individual Crossbar or Scheduler cannot compensate for information that is received with a checksum  
error. The following discussion reviews how these two types of devices are affected by receiving corrupted  
information.  
If a Crossbar detects a checksum error then it simply marks the cell as being corrupted. This information is  
passed to the egress Dataslice which will ignore that link and use the information from the other Crossbar.  
The Scheduler is more complicated because it must maintain accurate state information on the occupancy  
of all queues as well as the backpressure status of some of the egress queues. If a Scheduler receives a  
checksum error then it must effectively remove itself from the system.  
Consider the simple configuration illustrated in Figure 7. Scheduler 0 sees a checksum error on  
information it receives from EPP 1. Scheduler 0 now has incorrect state information. It immediately  
disables all of its outbound links so that EPP 1 and EPP 2 know that Scheduler 0 should be ignored. The  
EPPs now only accept information from Scheduler 1.  
Figure 7. Simple Redundant Scheduler Configuration  
EPP 1  
EPP 2  
Scheduler 0  
Scheduler 1  
If a new Scheduler-0 board is inserted in the system, then it must have its internal state updated to match  
that of Scheduler-1. This is done using a sequence of actions that are controlled by the ETT1 CPU. In  
essence, the linecards are temporarily stopped from sending new cells, and the state within each EPP is  
downloaded into the Schedulers, and then the linecards are restarted. The entire process is very rapid  
(much less than 1ms), but does cause best-effort traffic to be suspended for a brief time.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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