Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Table 25. Enhanced Port Processor Signal Descriptions (Continued)
Name
I/O
Type
Description
f2p_a1_[c cn, e, en, o,
on]
Fc Crossbar to EPP AIB
I
STI
f2p_b0_[c cn, e, en, o,
on]
Fc Crossbar to EPP AIB
Fc Crossbar to EPP AIB
EPP to Fc Crossbar AIB
EPP to Fc Crossbar AIB
EPP to Fc Crossbar AIB
EPP to Fc Crossbar AIB
I
I
I
I
I
I
STI
STI
STI
STI
STI
STI
f2p_b1_[c cn, e, en, o,
on]
p2f_a0_[c cn, e, en, o,
on]
p2f_a1_[c cn, e, en, o,
on]
p2f_b0_[c cn, e, en, o,
on]
p2f_b1_[c cn, e, en, o,
on]
Power Supply, Clock Source, Reset, and Diagnostics
soc_out
VDDA
O
CMOS
Buffered soc_in (NC)
VDD (2.5 V) for PLL
Isolated
Supply
VDD
Supply VDD (2.5 V)
Supply VDDQ (1.6 V)
VDDQ
ref_clk
I
I
PECL
PECL
PECL
PECL
CMOS
CMOS
System 200MHz clock
ref_clkn
soc_in
System 200MHz clock
System Start-of-cell
System Start-of-cell
Test output
I
soc_inn
plllock
I
O
I
pwrup_reset_in_L
Synchronous, Active Low Reset
JTAG Interface
jtag_tck
jtag_tdi
I
I
CMOS
CMOS
1149.1 JTAG 2.5V ONLY!
1149.1 JTAG 2.5V ONLY!
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
211
PMC [ PMC-SIERRA, INC ]
