PRELIMINARY
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Table 25. Enhanced Port Processor Signal Descriptions (Continued)
Name
I/O
Type
Description
jtag_tdo
jtag_tms
O
I
CMOS
CMOS
CMOS
1149.1 JTAG 2.5V ONLY!
1149.1 JTAG 2.5V ONLY!
1149.1 JTAG 2.5V ONLY!
jtag_trst_L
I
ASIC Manufacturing Test Interface
ce0_io
I
I
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Test (GND)
Test (GND)
Test (GND)
Test (GND)
Test (VDD)
ce0_scan
ce0_test
I
ce0_tstm3
I
lssd_ce1_a
lssd_ce1_b
lssd_ce1_c1
lssd_ce1_c2
lssd_ce1_c3
lssd_scan_in[19:0]
lssd_scan_out[19:0]
plltest_in
I
I
Test (VDD)
I
Test (VDD)
I
Test (VDD)
I
Test (VDD)
I
Scan input (GND)
Scan output
Test (GND)
Test output (NC)
O
I
plltest_out
O
Test (VDD) Should be driven to GND
during reset. All outputs are tristated
when low.
test_di1
test_di2
I
I
CMOS
CMOS
Test (VDD) Should be driven to GND
during reset. All outputs are tristated
when low.
test_lt
test_re
test_ri
I
I
I
CMOS
CMOS
CMOS
Test (VDD)
Test (GND)
Test (VDD)
212
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
