Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Address
Bits
Description
19:13 Must be set to 0x10
12:11 Must be set to 0x2 for Unicast traffic type
10:9
8:4
3:2
1:0
Priority
Destination Port
Destination Subport
Must be set to 0
Data
Bits
Description
31:13 Reserved.
12:7 Head
6:0
Length
3.4.2.64 Output MC Queue Drop Counters
Symbol: EOMCQDCT
Address Offset: 3E000-3FFFCh
Default Value: 000000000h
Access:
Read/Write
This set of registers is addressed by QID, but only MC addresses are valid. Each register contains the
number of MC cells dropped by the output EPP for this QID. Note that this value will stick at 0xFFFFFFFF.
There is only one register for each MC output queue (total of 4 registers, regardless of OC-48 mode).
Address
Bits
Description
19:13 Must be set to 0x1F
12:11 Must be set to 0x3 for Multicast traffic type
10:9
8:2
Priority
Must be set to 0
Must be set to 0
1:0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
207
PMC [ PMC-SIERRA, INC ]
