Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
3.4.2.51 TDM Sync Generation Control
Symbol: ETDMCTRL
Address Offset: 000CCh
Default Value: 00000000h
Access:
Read/Write
TDM Sync Generation Control register.
Bits
Description
31:13 Reserved.
12
TDM Frame Select. This bit specifies which TDM frame table to select.
TDM Sync Frequency. This represents the frequency of the TDM sync pulse. If this register is
set to N, a TDM sync signal is sent to the central Scheduler every N + 1 frame times.
11:0
3.4.2.52 No Grant Count
Symbol: ENOGCT
Address Offset: 000DOh
Default Value: FFFFFFFFh
Access:
Read/Write
No Grant Count register.
Bits
Description
Controls the frequency of sending cells without grants to the line card. This register is
used to guarantee that the linecard gets a gap in the stream of grants often enough so that it
can send idle cells without holding up cell payloads. If this register is set to 0x0, no grants are
sent to the linecard. If this register is set to 0xFFFFFFFF, no grants are held up. If this register
is set to N, a cell without a grant is sent every N+1 non-idle frame times. Note that this register
resets to 0xFFFFFFFF.
31:0
In OC-48 mode, (N+1) should be odd so that no-grant celltimes are distributed equally to all
four linecards, so the value written to this register (N) should be even.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
195
PMC [ PMC-SIERRA, INC ]
