PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Register 0x02C : FREEDM-84A672 Master SBI Interrupt Status
Bit
Type
Function
Default
Bit 15
to
Unused
XXH
Bit 1
Bit 0
R
SBIEXTI
X
This register reports the interrupt status for various events detected or initiated by
the SBI circuitry within the FREEDM-84A672. Reading this register
acknowledges and clears the interrupts.
SBIEXTI:
The SBI Extracter interrupt status bit (SBIEXTI) reports an error condition
from the SBI Extract block to the microprocessor. SBIEXTI remains valid
when interrupts are disabled and may be polled to detect SBI Extract block
error conditions.
Note
The only error condition which the SBI Extract block reports is a parity error
on the SBI DROP BUS. If parity errors occur, the SBI EXTRACT Parity Error
Interrupt Reason register (0x5DC) may be read to obtain more detailed
information concerning the error.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
81
PMC [ PMC-SIERRA, INC ]
