PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
Table 28 – Test Mode Register Memory Map
Address TA[12:0]
Register
0x0000 - 0x07FE
0x0800 - 0x10FE
0x1100 - 0x11FE
0x1200 - 0x123E
0x1240 - 0x137E
0x1380 - 0x13BE
0x13C0 - 0x13FE
0x1400 - 0x14FE
0x1500 - 0x151E
0x1520 - 0x157E
0x1580 - 0x15BE
0x15C0 - 0x15FE
0x1600 - 0x163E
0x1640 - 0x167E
0x1680 - 0x16FE
0x1700 - 0x17FE
0x1800 - 0x18FE
0x1900 - 0x19FE
0x1A00 - 0x1AFE
0x1B00 - 0x1BFE
0x1C00 - 0x1CFE
0x1D00 - 0x1DFE
0x1E00 - 0x1FFE
Normal Mode Registers
Reserved
RCAS672 Test Registers
RHDL672 Test Registers
Reserved
THDL672 Test Registers
Reserved
TCAS672 Test Registers
PMON Test Registers
Reserved
RAPI672 Test Registers
SBI EXTRACT Test Registers
TAPI672 Test Registers
Reserved
SBI INSERT Test Registers
Reserved
SBI PISO#1 Test Registers
SBI PISO#2 Test Registers
SBI PISO#3 Test Registers
SBI SIPO#1 Test Registers
SBI SIPO#2 Test Registers
SBI SIPO#3 Test Registers
Reserved
Notes on Test Mode Register Bits:
1. Writing values into unused register bits has no effect. However, to ensure software
compatibility with future, feature-enhanced versions of the product, unused register
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
182
PMC [ PMC-SIERRA, INC ]
