PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
During clock 2, the target indicates that it wishes to disconnect by asserting
STOPB. Data may be transferred depending on the state of the ready lines.
During clock 3, the initiator negates FRAMEB to signal the end of the cycle.
During clock 4, the target negates STOPB and DEVSELB in response to the
FRAMEB signal being negated.
Figure 29 – PCI Target Disconnect
1
2
3
4
5
6
PCICLK
T
FRAMEB
STOPB
DEVSELB
The PCI Target Abort Diagram (Figure 30) illustrates the case when the target
wants to abort the current cycle. Note, when the FREEDM-84P672 is the target,
it never aborts the current cycle. A target abort is an indication of a serious error
and no data is transferred.
A target can terminate the current cycle by asserting STOPB and negating
DEVSELB. If the FREEDM-84P672 is the initiator and the target aborts the
current access, the abort condition is reported to the PCI Host.
During clock 1, a cycle is in progress.
During clock 2, the target negates DEVSELB and TRDYB and asserts STOPB to
indicate an abort condition to the initiator.
During clock 3, the initiator negates FRAMEB in response to the abort request.
During clock 4, the target negates STOPB signal in response to the FRAMEB
signal being negated.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
327
PMC [ PMC-SIERRA, INC ]
