PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
C2[15:0]:
The C2[15:0] bits reports the number of selected events that have been
detected since the last time this register was polled. This register is polled by
writing to the FREEDM-84P672 Master Clock / Frame Pulse Activity Monitor
and Accumulation Trigger register. The write access transfers the internally
accumulated error count to the configurable count #2 register and
simultaneously resets the internal counter to begin a new cycle of event
accumulation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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