RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
3. All FREEDM-32A256 outputs can be tristated under control of the IEEE
P1149.1 test access port, even those which do not tristate under normal
operation. All outputs and bi-directionals with the exception of the Any-PHY
interface are 5 V tolerant when tristated. (The Any-PHY interface is 3.3V
tolerant.)
4. All inputs with the exception of the Any-PHY and microprocessor interfaces
are Schmitt triggered. Inputs ALE, TMS, TDI and TRSTB have internal pull-
up resistors.
5. Power to the VDD3V3 pins should be applied before power to the VDD2V5
pins is applied. Similarly, power to the VDD2V5 pins should be removed
before power to the VDD3V3 pins is removed.
PROPRIETARY AND CONFIDENTIAL
43
PMC [ PMC-SIERRA, INC ]
