RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
8
FUNCTIONAL DESCRIPTION
8.1 High Speed Multi-Vendor Integration Protocol (H-MVIP)
H-MVIP defines a synchronous, time division multiplexed (TDM) bus of Nx64
Kbps constant bit rate (CBR) data streams. Each 64 Kbps data stream (time-
slot) carries an 8-bit byte of HDLC traffic, as described in the following section,
and is characterised by 8 KHz framing. H-MVIP supports higher bandwidth
applications on existing telephony networks by fitting more time-slots into a 125
ꢁs frame. The FREEDM-32A256 supports H-MVIP data rates of 2.048 Mbps and
8.192 Mbps with 32 or 128 time-slots per frame and associated clocking
frequencies of 4.096 and 16.384 MHz respectively. Figure 1 shows a diagram of
the H-MVIP protocol supported by the FREEDM-32A256 device.
Figure 1 – H-MVIP Protocol
125 us
Data Clock
(4, 16 MHz)
Frame Pulse Clock
(4 MHz)
Frame Pulse
(8 KHz)
Serial Data
B7
B8
B1
B2
TS 0
B8
B1
B2
TS 1
B7
B8
TS 31/127
TS 31/127
8.2 High-Level Data Link Control (HDLC) Protocol
Figure 2 shows a diagram of the synchronous HDLC protocol supported by the
FREEDM-32A256 device. The incoming stream is examined for flag bytes
(01111110 bit pattern) which delineate the opening and closing of the HDLC
packet. The packet is bit de-stuffed which discards a "0" bit which directly follows
five contiguous "1" bits. The resulting HDLC packet size must be a multiple of an
octet (8 bits) and within the expected minimum and maximum packet length
limits. The minimum packet length is that of a packet containing two information
bytes (address and control) and FCS bytes. For packets with CRC-CCITT as
PROPRIETARY AND CONFIDENTIAL
44
PMC [ PMC-SIERRA, INC ]
