RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
the RPA signal. Note that each poll address is separated by a NULL address to
generate tristate turn-around cycle in order to prevent multiple FREEDM-32A256
devices from briefly driving RPA. If RPA is a point-to-point signal for each
FREEDM-32A256 device on the board, then the tristate turn-around cycle is not
required, thereby effectively doubling the polling bandwidth at the expense of
extra signals.
Polled results reflect the status of the two FIFOs in the RAPI256. Polled
responses always refer to the next data transfer. In other words, polled
responses during or after the RXCLK cycle where RSX is set high refer to the
FIFO which is not involved in the current data transfer. For example, once FIFO
one begins transferring data on the Rx APPI (RSX set high), any polls against
that FREEDM-32A256 device respond with the status of FIFO two. This allows
the external controller to gather knowledge about the FIFO not involved in the
current data transfer so that it can anticipate reselecting that FREEDM-32A256
device (via RENB) to maximize bandwidth on the Rx APPI (shown in Figure 24).
Figure 23 – Receive APPI Timing (Auto Deselection)
RXCLK
RXADDR[2:0]
RPA
Dev 0
NULL
Dev 7
Dev 0
NULL
CH 2
Dev 6
Dev 7
NULL
Dev 4
D98
NULL
Dev 4
Dev 0
NULL
Dev 0
Dev 3
CH 8
NULL
Dev 2
Dev 3
NULL
Dev 2
RENB
Dev 0
D1
Dev 0
D0
RXDATA[15:0]
RVAL
D0
D99
D1
RSX
REOP
RMOD
RERR
Figure 23 shows the transfer of a 100 word packet across the Rx APPI from
FREEDM-32A256 device 0, channel 2 followed by the transfer of a 2 word packet
from FREEDM-32A256 device 0, channel 8. More importantly, Figure 23
illustrates that, for back-to-back transfers from the same FREEDM-32A256
(device 0), it must be reselected before any further data is provided on the Rx
APPI.
At the end of the first 100 word packet transfer across the Rx APPI, the
FREEDM-32A256 automatically deselects and must be reselected before the
second two word packet is transferred. When the external controller samples
REOP high, it recognizes that the burst transfer has completed. Two RXCLK
cycles later, the external controller reselects FREEDM-32A256 device 0 by
setting RENB high and placing address 0 on the RXADDR[2:0] signals. When
PROPRIETARY AND CONFIDENTIAL
195
PMC [ PMC-SIERRA, INC ]
