RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x500 : PMON Status
Bit
Type
Function
Default
Bit 15
to
Unused
XXXH
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
C2DET
C1DET
UFDET
OFDET
Unused
Unused
X
X
X
X
X
X
This register contains status information indicating whether a non-zero count has
been latched in the count registers.
OFDET:
The overflow detect bit (OFDET) indicates the status of the PMON Receive
FIFO Overflow Count register. OFDET is set high when overflow events have
occurred during the latest PMON accumulation interval. OFDET is set low if
no overflow events are detected.
UFDET:
The underflow detect bit (UFDET) indicates the status of the PMON Transmit
FIFO Underflow Count register. UFDET is set high when underflow events
have occurred during the latest PMON accumulation interval. UFDET is set
low if no underflow events are detected.
C1DET:
The configurable event #1 detect bit (C1DET) indicates the status of the
PMON Configurable Count #1 register. C1DET is set high when selected
events have occurred during the latest PMON accumulation interval. C1DET
is set low if no selected events are detected.
PROPRIETARY AND CONFIDENTIAL
145
PMC [ PMC-SIERRA, INC ]
