RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Figure 36 – PCI Target Abort
1
2
3
4
5
6
PCICLK
T
FRAMEB
TRDYB
STOPB
DEVSELB
The PCI Bus Request Cycle Diagram (Figure 37) illustrates the case when the
initiator is requesting the bus from the bus arbiter.
When the FREEDM-32P672 is the initiator, it requests the PCI bus by asserting
its REQB output to the central arbiter. The arbiter grants the bus to the
FREEDM-32P672 by asserting the GNTB line. The FREEDM-32P672 will wait
till both the FRAMEB and IRDYB lines are idle before starting its access on the
PCI bus. The arbiter can remove the GNTB signal at any time, but the
FREEDM-32P672 will complete the current transfer before relinquishing the bus.
Figure 37 – PCI Bus Request Cycle
1
2
3
4
5
6
PCICLK
REQB
GNTB
T
FRAMEB
The PCI Initiator Abort Termination Diagram (Figure 38) illustrates the case when
the initiator aborts a transaction on the PCI bus.
An initiator may terminate a cycle if no target claims it within five clock cycles. A
target may not have responded because it was incapable of dealing with the
request or a bad address was generated by the initiator. IRDYB must be valid
one clock after FRAMEB is deasserted as in a normal cycle. When the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
299
PMC [ PMC-SIERRA, INC ]
