RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Register 0x3C : Interrupt Line / Interrupt Pin / MIN_GNT / MAX_LAT
Bit
Type
Function
Default
Bit 31
to
R
MAXLAT[7:0]
0FH
Bit 24
Bit 23
R
R
MINGNT[7:0]
INTPIN[7:0]
INTLNE[7:0]
05H
01H
00H
to
Bit 16
Bit 15
to
Bit 8
Bit 7
R/W
to
Bit 0
INTLNE[7:0]:
The Interrupt Line (INTLNE[7:0]) field is used to indicate interrupt line routing
information. The values in this register are system specific and set by the PCI
Host.
INTPIN[7:0]:
The Interrupt Pin (INTPIN[7:0]) field is used to specify the interrupt pin the
GPIC uses. Since the GPIC will use INTAB on the PCI bus, the value in this
register is set to one.
MINGNT[7:0]:
The Minimum Grant (MINGNT[7:0]) field specifies how long of a burst period
the bus master needs (in increments of 250 nsec).
MAXLAT[7:0]:
The Maximum Latency (MAXLAT[7:0]) field specifies how often a bus master
needs access to the PCI bus (in increments of 250 nsec).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
262
PMC [ PMC-SIERRA, INC ]
