RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Register 0x104 : RCAS Indirect Channel Data
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXH
Bit 16
Bit 15
Bit 14
R/W
R/W
CDLBEN
PROV
0
0
Bit 13
Unused
XH
to
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CHAN[9]
CHAN[8]
CHAN[7]
CHAN[6]
CHAN[5]
CHAN[4]
CHAN[3]
CHAN[2]
CHAN[1]
CHAN[0]
0
0
0
0
0
0
0
0
0
0
This register contains the data read from the channel provision RAM after an
indirect read operation or the data to be inserted into the channel provision RAM
in an indirect write operation.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
CHAN[9:0]:
The indirect data bits (CHAN[9:0]) report the channel number read from the
channel provision RAM after an indirect read operation has completed.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
123
PMC [ PMC-SIERRA, INC ]
