RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
Register 0x018 : FREEDM-32P672 Master Line Loopback #2
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXH
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LLBEN[31]
LLBEN[30]
LLBEN[29]
LLBEN[28]
LLBEN[27]
LLBEN[26]
LLBEN[25]
LLBEN[24]
LLBEN[23]
LLBEN[22]
LLBEN[21]
LLBEN[20]
LLBEN[19]
LLBEN[18]
LLBEN[17]
LLBEN[16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register controls line loopback for links #16 to #31.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
LLBEN[31:16]:
The line loopback enable bits (LLBEN[31:16]) controls line loopback for
links #31 to #16. When links #16 through #31 are configured for channelised
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
109
PMC [ PMC-SIERRA, INC ]
