RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Register 0x108 : RCAS Framing Bit Threshold
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
X
X
X
X
X
X
X
X
X
0
Unused
Unused
Unused
Unused
Unused
Bit 8
Unused
Bit 7
Unused
Bit 6
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FTHRES[6]
FTHRES[5]
FTHRES[4]
FTHRES[3]
FTHRES[2]
FTHRES[1]
FTHRES[0]
Bit 5
1
Bit 4
1
Bit 3
1
Bit 2
1
Bit 1
1
Bit 0
1
This register contains the threshold used by the clock activity monitor to detect for framing
bits/bytes.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
FTHRES[6:0]:
The framing bit threshold bits (FTHRES[6:0]) contains the threshold used by the clock activity
monitor to detect for the presence of framing bits. A counter in the clock activity monitor of
each receive link increments at each SYSCLK and is cleared, when the BSYNC bit of that link
is set low, by each rising edge of the corresponding RCLK[n]. When the BSYNC bit of that
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
105