RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
Register 0x011: Microprocessor Insert FIFO Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
INSCRCEND
INSCRCPR
INSRST
INSFSEL[2]
INSFSEL[1]
INSFSEL[0]
X
X
0
1
X
0
0
0
R/W
R/W
W
R/W
R/W
R/W
INSFSEL[2:0]:
The INSFSEL[2:0] bits are used to select the one of eight Microprocessor
Insert FIFOs for a cell write operation. The Insert FIFO has to be selected
prior to starting a cell transfer. The value of INSFSEL[2:0] corresponds to the
index of the serial link (i.e. the ‘n’ in TXDn+/-) on which the cell will be
presented. The Microprocessor Insert FIFO has to be selected prior to
starting the cell transfer. Due to synchronization delays, a read of the
Microprocessor Cell Buffer Data register should not be initiated until two
REFCLK periods after completion of the write of these bits.
INSRST:
The INSRST bit allows the microprocessor to abort a cell write to the
Microprocessor Insert FIFO. If INSRST is set to a logic 1 when previously
logic 0, the insert write pointer is reset without completing the transaction.
Setting INSRST after the last write (i.e. at the beginning of the next cell) has
no effect. To abort a cell, the microprocessor must have written at least the
first byte of the cell but less than 56 bytes.
INSRST is not readable.
This bit is cleared on every write to Microprocessor Cell Data register.
INSCRCPR:
The INSCRCPR bit is used to force the value of the Insert CRC-32
accumulation register to its preset value. If INSCRCPR is set to logic 1, the
Insert CRC-32 accumulation register is kept to its preset value. If INSCRCPR
is set to logic 0, CRC-32 calculations are performed on inserted cells. CRC-
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
75
PMC [ PMC-SIERRA, INC ]
