RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
CELLXFERRE:
The Cell Transfer Error Interrupt Enable (CELLXFERRE) bit allows the
generation of an interrupt on an invalid selection by an external master
device. This occurs when a cell transfer is attempted, but the VORTEX has
indicated no cell is available by returning RPA low when polled. When
CELLXFERRE is set to logic 1, the INTB output is asserted low when the
CELLXFERRI bit is logic 1.
CELLXFERRI:
The CELLXFERRI bit provides a status of the Cell Transfer Error Interrupt.
This interrupt status is asserted when an external master device selects the
Upstream Cell Interface (i.e. RADR[4:0] value equals the state of VADR[4:0]
when RENB is last sampled high) for a transfer without a cell being available.
This bit does not indicate the case where RENB is held low beyond the end
of a cell transfer, when there is not a second cell to transfer. This bit is reset
immediately after a read to this register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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