RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
Register 0x003: Transmit Serial Interrupt Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
TXI[7]
TXI[6]
TXI[5]
TXI[4]
TXI[3]
TXI[2]
TXI[1]
TXI[0]
X
X
X
X
X
X
X
X
TXI[7:0]:
This register indicates whether there is a pending interrupt for a particular
serial link. TXI[n] is associated with TXDn+/-. If TXI[n] is logic 1, at least one
interrupt status bit within the associated Transmit High-Speed Serial Cell
Count Status or Downstream Logical Channel FIFO Interrupt Status registers
that has its corresponding enable set is a logic 1.
These bits are not self-clearing; they are only cleared to logic 0 by reading the
associated Transmit High-Speed Serial Cell Count Status or Downstream
Logical Channel FIFO Interrupt Status registers.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
60
PMC [ PMC-SIERRA, INC ]
