RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
Register 0x084, 0x0A4, 0x0C4, 0x0E4, 0x104, 0x124, 0x144, 0x164:
Receive High-Speed Serial HCS Error Count
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
HCSERR[7]
HCSERR[6]
HCSERR[5]
HCSERR[4]
HCSERR[3]
HCSERR[2]
HCSERR[1]
HCSERR[0]
X
X
X
X
X
X
X
X
HCSERR[7:0]:
If the either the CELLCRC or CNTCELLERR bit of the Receive High Speed
Serial Configuration register is logic 0, the HCSERR[7:0] bits indicate the
number of HCS error events that occurred during the last accumulation
interval on the associated RXDn+/- link.
If the CELLCRC and CNTCELLERR bits are logic 1, the HCSERR[7:0] bits
indicate the number of cells with non-zero cell CRC-8 or HCS remainders.
The contents of this register become valid a maximum of 300 ns after a
transfer is triggered by a write to this register, one of the associated (i.e. this
link only) Receive High-Speed Serial Cell Counter registers or the Load
Performance Meters (0x000) register, and remain valid until another transfer
is triggered.
The count saturates at all ones.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
94
PMC [ PMC-SIERRA, INC ]
