RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
Registers 0x083, 0x0A3, 0x0C3, 0x0E3, 0x103, 0x123, 0x143, 0x163:
Receive High-Speed Serial Interrupt Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
OVR
XFERI
HCSI
X
X
X
X
X
X
X
X
OCDI
CELLERRI
ACTI
LCDI
LOSI
These registers provide an indication of events that have occurred since the last
time it was read. These bits are not affected by the programming of the Receive
High-Speed Serial Interrupt Enables register, which only determines whether the
status of the bits in these registers is propagated to the INTB output.
LOSI:
The LOSI bit is set to logic 1 whenever the associated LOSV register bit
changes state. This bit is reset immediately after a read to this register.
LCDI:
The LCDI bit is set to logic 1 whenever the associated LCDV register bit
changes state. This bit is reset immediately after a read to this register.
ACTI:
The ACTI bit is set to logic 1 whenever the associated ACTV register bit
changes state. This bit is reset immediately after a read to this register.
CELLERRI:
The CELLERRI bit is set high when a non-zero remainder occurs for the
CRC-8 protecting the entire cell. This bit is reset immediately after a read to
this register.
HCSI:
The HCSI bit is set high when a HCS error is detected. This bit is reset
immediately after a read to this register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
92
PMC [ PMC-SIERRA, INC ]
