欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM7350-PI 参数 Datasheet PDF下载

PM7350-PI图片预览
型号: PM7350-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 双串行链路物理层复用器 [DUAL SERIAL LINK PHY MULTIPLEXER]
分类和应用: 复用器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 241 页 / 1939 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM7350-PI的Datasheet PDF文件第23页浏览型号PM7350-PI的Datasheet PDF文件第24页浏览型号PM7350-PI的Datasheet PDF文件第25页浏览型号PM7350-PI的Datasheet PDF文件第26页浏览型号PM7350-PI的Datasheet PDF文件第28页浏览型号PM7350-PI的Datasheet PDF文件第29页浏览型号PM7350-PI的Datasheet PDF文件第30页浏览型号PM7350-PI的Datasheet PDF文件第31页  
RELEASED  
PM7350 S/UNI-DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 5  
DUAL SERIAL LINK PHY MULTIPLEXER  
8
PIN DESCRIPTION  
Ball  
Ball  
Name  
Type  
No. Function  
High Speed LVDS Links  
RXD1+  
RXD1-  
RXD2+  
RXD2-  
Diff.  
LVDS  
Input  
G14 The high-speed receive data (RXD1+/-, RXD2+/-)  
G13 inputs present NRZ data from a serial backplane.  
J14 Two pairs are provided for redundancy. The active  
J13 link may be chosen by the local microprocessor or  
determined by a simple handshake.  
RXD1+/- and RXD2+/- are truly differential inputs  
offering superior common-mode noise rejection.  
They have sufficient sensitivity and common-mode  
range to support LVDS signals.  
TXD1+  
TXD1-  
TXD2+  
TXD2-  
Diff.  
H14 The transmit differential data (TXD1+/-, TXD2+/-)  
H13 outputs present NRZ encoded data to a serial  
K14 backplane. These outputs are open drain current  
K13 sinks which interface directly with twisted-pair  
cabling or board interconnect. Edge rates are  
LVDS  
Output  
controlled to minimize radiated emissions.  
Both differential links carry identical traffic except  
the exact phase relationship is not guaranteed.  
REFCLK  
Input  
P12 The reference clock input (REFCLK) must provide a  
jitter-free reference clock. It is used as the  
reference clock by both clock recovery and clock  
synthesis circuits. Any jitter below 1 MHz is  
transferred directly to the TXD1+/- and TXD2+/-  
outputs. The high-speed serial interface bit rate is  
eight times the REFCLK frequency.  
RES  
Analog G12  
H11  
A 4.75k±1% resistor must be connected between  
these two pins to achieve the correct LVDS output  
signal levels.  
RESK  
ATP0  
ATP1  
Analog  
L14 The Analog Test Points (ATP) are provided for  
L13 production test purposes. In mission mode they  
are high impedance and should be connected to  
ground.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
15