RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
SCIANY
OBUS8
OANYPHY
OMASTER
OENB
SCI-PHY
Transmit
Master/
Receive
Slave
OADDR[4:0]
OAVALID
ODAT[15:0]
OPRTY
OSOC
OSX
OFCLK
OCA
RXD1+
RXD1-
per-PHY
buffers
LTXD[15:0]
LTXC[15:0]
TXD1+
Time-Sliced
ATM
Transmission
Convergence
TXD1-
Cell
Processor
Elastic
Store
LRXD[15:0]
LRXC[15:0]
RXD2+
RXD2-
per-PHY
buffers
TXD2+
TXD2-
IBUS8
IANYPHY
IMASTER
IENB
SCI-PHY
IADDR[4:0]
IAVALID
IDAT[15:0]
IPRTY
Receive
Master/
Transmit
Slave
ISOC
ISX
IFCLK
ICA
Clock
Synthesis
REFCLK
A[7:0]
RDB
W RB
CSB
2 Cell
Buffer
Micro-
Processor
Interface
4 Cell
FIFO
TDO
TDI
ALE
JTAG
Test Access
Port
INTB
RSTB
TCK
to all
blocks
TMS
TRSTB
D[7:0]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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