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PM7350-PGI 参数 Datasheet PDF下载

PM7350-PGI图片预览
型号: PM7350-PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA160, 15 X 15 MM, 1.81 MM HEIGHT, PLASTIC, BGA-160]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 245 页 / 898 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 8  
DUAL SERIAL LINK PHY MULTIPLEXER  
oaddr_2_ltxc_0  
octrl_oen  
46  
47  
48  
49  
IO_CELL  
ENABLE  
IO_CELL  
IO_CELL  
octrl_oen idat_13_ltxc_12  
idat_14_ltxd_12  
96  
97  
98  
99  
IN_CELL  
IO_CELL  
IN_CELL  
IO_CELL  
csd_oen  
csd_oen  
oaddr_3_ltxc_1  
oaddr_4_lrxc_1  
octrl_oen idat_15_ltxc_13  
octrl_oen iprty_ltxd_13  
NOTES:  
1. When set high, HIZ_OEN forces all OUT_CELL and IO_CELL except  
INTB and RSTOB to high impedance.  
2. RX8K_OEN is the first bit of the boundary scan chain scanned in and out.  
11.2.1  
Boundary Scan Cells  
In the following diagrams, CLOCK-DR is equal to TCK when the current controller  
state is SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The multiplexer in  
the center of the diagram selects one of four inputs, depending on the status of  
select lines G1 and G2. The ID Code bit is as listed in the Boundary Scan Register  
table located above.  
Fig. 12 Input Observation Cell (IN_CELL)  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
181  
 
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