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PM7348 参数 Datasheet PDF下载

PM7348图片预览
型号: PM7348
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM/SONET/SDH IC, CMOS, PBGA324,]
分类和应用: ATM异步传输模式
文件页数/大小: 318 页 / 1736 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI-IMA-4 Telecom Standard Product Data Sheet  
Released  
10.3 Link FIFOs  
In the transmit direction, per link FIFOs exist to provide an elastic store to ensure proper  
operation. The number of cells in the FIFO at any particular time varies as a function of the  
CDV introduced by the insertion of stuff cells and ICP cells, the effects of the physical link  
interface, and the smoothing of data from the ATM layer for group level CDV. During  
operation, these FIFOs are loaded a cell at a time and emptied in a TDM fashion. The Link  
FIFOs in the transmit direction are 9 cells deep.  
In the receive direction, the link FIFOs serve as an interface between the TDM domain and the  
ATM cell domain. Cells are gathered in the FIFO for each link and then burst out to the external  
memory by the RDAT. The Link FIFOs in the receive direction are 2 cells deep.  
A diagnostic loopback capability is provided to loopback data from the receive link FIFOs to  
the transmit link FIFO; this will loopback all links when enabled.  
10.4 TC Layer  
10.4.1 TX TC Layer (TTTC)  
The TX TC layer (TTTC) performs the TC layer functions. These functions consist of optional  
HEC generation, optional payload scrambling, and cell-rate decoupling through physical layer  
(idle) cell insertion.  
This function removes data byte by byte from the per-link FIFOs as required to provide data to  
the physical layer function. When the physical layer function needs a byte of data, it will request  
data from the (TTTC). The TTTC will then read a byte of data from the per-link FIFO. If that  
byte is the first byte of a cell and the logical channel FIFO is empty, the TTTC will format the  
next 53 bytes as a physical layer (idle) cell. If the byte is the fifth byte of a cell, the byte is  
8
2
optionally overwritten by the HCS. The HCS is a CRC-8 (x + x + x + 1) calculation over the  
first 4 octets of the ATM cell header. In accordance with ITU-T Recommendation I.432.1, the  
6
4
2
coset polynomial x + x + x + 1 is added (modulo 2) to the received HCS octet before  
rd  
insertion (coset addition is not configurable). The sixth through 53 bytes may be scrambled  
by a x +1 self-synchronous scrambler.  
43  
Note: Since the Link FIFOs are cell based, an underrun cannot happen in the middle of a cell.  
10.4.2 Rx TC Layer (RTTC)  
The Rx TC (RTTC) layer implements HCS cell delineation, payload descrambling, idle cell  
filtering and header error detection to recover valid ATM cells. These functions are performed in  
accordance with ITU-T Recommendation I.432.1.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2020889, Issue 2  
81