S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
10 Functional Description
This section describes the function of each entity in the S/UNI-IMA-4 block diagram.
Throughout this document the use of the term “transmit” implies data read in from the cell
interface and sent out the line side interface. Conversely, “receive” is used to describe the data
path from the line side interface to the cell interface.
The term “virtual PHY” refers to a single flow on the Any-PHY/UTOPIA bus. Each IMA group
or a single TC connection is mapped to a virtual PHY. For simplicity, both an IMA group and a
TC connection will be referenced as a group.
Each IMA group can map data to/from multiple links. Each TC group is mapped to a single link.
The term “link” refers to a single T1/E1 link or unchannelized link on the clock/data interface.
When supporting fractional T1/E1 via the Clock/Data interface, the timeslots that are chosen to
be part of the fractional connection are also referred to as a link.
Within the clock/data interface, the external links are mapped to a contiguous space identified as
Virtual Links. To support multiple fractional TC flows on a single external signal, a mapping is
used to split a single channelized external signal into multiple Virtual Links. At the per-link
FIFOs, the clock/data Virtual Link naming convention is used synonymously with the Physical
Link naming convention.
10.1 Any-PHY/UTOPIA Interfaces
The ATM cell interfaces are Any-PHY compliant 8/16 bit slave interfaces that are compatible
with the following options:
Sꢀ Any-PHY Slave.
Sꢀ UTOPIA Level 2, 4-port slave (multi-PHY-mode).
Sꢀ UTOPIA Level 2, single port slave (single address mode) for receive side only.
10.1.1 Transmit Any-PHY/UTOPIA Slave (TXAPS)
In the transmit direction, each S/UNI-IMA-4 receives cells on the Any-PHY/UTOPIA L2
compatible interface operating at clock rates up to 52 MHz and supporting 16-bit and 8-bit wide
cells. The S/UNI-IMA-4 operates as a bus slave only.
Cell transfers are cell-based, that is, an entire cell is transferred from one PHY device before
another is selected. Polling occurs concurrently with cell transfers to ensure maximum
throughput. Data pausing is not supported in Any-PHY mode. If the TENB is deasserted prior
to a complete cell being transferred, the cell transfer error interrupt will be triggered.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
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PMC [ PMC-SIERRA, INC ]
