Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Figure 46 shows the operation of the multicast pointer FIFOs. When a multicast cell arrives, it is
immediately stored to RAM. The pointer to that cell buffer and the OUTCHAN for that cell are
put onto one of eight input FIFOs. There is one FIFO per input multicast SC. A background
pointer replication process which runs at the UTOPIA rate copies pointers from the input FIFOs
to the output FIFOs. It does so by traversing the linked list for that OUTCHAN and copying the
pointer to the cell buffer to the output FIFO for that SC on the proper VO.
The background process dynamically identifies if any of the output FIFOs are full. If any become
full, the process records which VOs are full for that SC and ceases transferring cells for that SC.
Transfers still are free to occur for other SCs. Once the dequeue process serves a cell instance
from that SC on the bottlenecked VO, the background process is free to continue to do replica-
tions for that SC.
The background process runs at exactly the same rate as the UTOPIA interface. This allows it to
transmit multicast cells at the full rate out of the interface, even if each multicast cell is only going
to one destination on this QRT.
Channel RAM
Linked List
31 × 8 Per-SC, Per-VO Output
Pointer FIFOs
Eight Per-SC Input Pointer FIFOs
Header
Background
Pointer
Replication
Process
Cell Pointer,
Channel #
Cell
Cell Pointer
Cell
SDRAM
•
•
•
= Cell header translation flow
= Cell pointer control flow
= Cell payload flow
Figure 46. Multicast Pointer FIFO Operation
41
PMC [ PMC-SIERRA, INC ]
